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LTC6101 High Voltage, High-Side Current Sense Amplifier in SOT-23
FEATURES

DESCRIPTIO
Supply Range: 4V to 60V, 70V Absolute Maximum Low Offset Voltage: 450V (Max) Fast Response: 1s Response Time (0V to 2.5V on a 5V Output Step) Gain Configurable with 2 Resistors Low Input Bias Current: 170nA Max PSRR 4V to 60V: 110dB Min Max Output Current: 1mA Low Supply Current: 250A, VS = 14V Low Profile (1mm) SOT-23 (ThinSOTTM) Package
The LTC(R)6101 is a versatile, high voltage, high side current sense amplifier. Design flexibility is provided by the excellent device characteristics; the LTC6101 boasts 450V Max offset and operates on supplies from 4V to 60V with only 375A (typical at 60V) of current consumption. The LTC6101 monitors current via the voltage across an external sense resistor (shunt resistor). Internal circuitry converts input voltage to output current, allowing the output to be translated from the positive rail to the negative rail using a single output resistor. Low DC offset allows the use of a small shunt resistor and large gain-setting resistors. As a result, power loss in the shunt as well as shunt reliability is improved. The wide operating supply range and high accuracy makes the LTC6101 ideal for a large array of applications from automotive to industrial can power management. A maximum input sense voltage of 500mV allows a wide range of currents to be monitored. The fast response makes the LTC6101 the perfect choice for load current warnings and shutoff protection control. With very low supply current, the LTC6101 is suitable for power sensitive applications. The LTC6101 is available in a 5-lead SOT-23 package.
APPLICATIO S

Current Shunt Measurement Battery Monitoring Remote Sensing Power Management
, LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATIO
ILOAD
16-Bit Resolution Unidirectional Output into LTC2433 ADC
-
VSENSE
+
RIN 100
4V TO 60V
4 L O A D 2
3
+-
5 5V 1F
5.5V 5V TA = 25C V+ = 12V RIN = 100 ROUT = 5k IOUT = 100A
LTC6101
1
VOUT LTC2433-1 TO P
ROUT 4.99k
0.5V 0V
6101 TA01
VOUT =
ROUT * VSENSE = 49.9VSENSE RIN
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Step Response
VSENSE VSENSE =100mV VOUT IOUT = 0 500ns/DIV
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LTC6101
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
ORDER PART NUMBER
TOP VIEW OUT 1 V- 2 -IN 3 4 +IN 5 V+
Total Supply Voltage (V+ to V-) .............................. 70V Minimum Input Voltage (-IN Pin) ................... (V+ - 4V) Maximum Output Voltage (Out Pin) ........................... 9V Input Current ..................................................... 10mA Output Short-Circuit Duration (to V-) ............. Indefinite Operating Temperature Range (Note 2) LTC6101C .......................................... - 40C to 85C LTC6101I ............................................ - 40C to 85C LTC6101H ....................................... - 40C to 125C Specified Temperature Range (Note 3) LTC6101C .......................................... - 40C to 85C LTC6101I ............................................ - 40C to 85C LTC6101H ....................................... - 40C to 125C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
S5 PACKAGE 5-LEAD PLASTIC TSOT-23
LTC6101BCS5 LTC6101CCS5 LTC6101BIS5 LTC6101CIS5 LTC6101BHS5 LTC6101CHS5 S5 PART MARKING* LTBND
TJMAX = 150C, JA = 250C/ W
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grades and parametric grades are identified by a label on the shipping container.
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C, RIN = 100, ROUT = 10k, VSENSE+ = V+ (see Figure 1 for details), 4V VS 60V unless otherwise noted.
SYMBOL VS VOS PARAMETER Supply Voltage Range Input Offset Voltage VSENSE = 5mV, Gain = 100, LTC6101B
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN 4
TYP 150 400
MAX 60 450 810 1500 2500
UNITS V V V V V V/C V/C
VSENSE = 5mV, Gain = 100, LTC6101C
VOS IB IOS VSENSE(MAX) PSRR
Input Offset Voltage Drift Input Bias Current Input Offset Current Input Sense Voltage Full Scale Power Supply Rejection Ratio
VSENSE = 5mV, LTC6101B VSENSE = 5mV, LTC6101C RIN = 1M

3 10 100 170 235 15
RIN = 1M VOS within Specification, RIN = 1k VS = 6V to 60V, VSENSE = 5mV, Gain = 100

2 500 118 115 110 105 8 3 1 140 133
VS = 4V to 60V, VSENSE = 5mV, Gain = 100
VOUT
Maximum Output Voltage
12V VS 60V, VSENSE = 88mV VS = 6V, VSENSE = 330mV, RIN = 1k, ROUT = 10k VS = 4V, VSENSE = 550mV, RIN = 1k, ROUT = 2k

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nA nA nA mV dB dB dB dB V V V
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LTC6101
ELECTRICAL CHARACTERISTICS
The denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C, RIN = 100, ROUT = 10k, VSENSE+ = V+ (see Figure 1 for details), 4V VS 60V unless otherwise noted.
SYMBOL VOUT (0) PARAMETER Minimum Output Voltage CONDITIONS VSENSE = 0V, LTC6101B, Gain = 100
MIN
TYP 0 0
MAX 45 81 150 250
UNITS mV mV mV mV mA mA
VSENSE = 0V, LTC6101C, Gain = 100
IOUT tr BW IS
Maximum Output Current Input Step Response (to 2.5V on a 5V Output Step) Signal Bandwidth Supply Current
6V VS 60V, ROUT = 2k, VSENSE = 110mV, Gain = 20 VS = 4V, VSENSE = 550mV, Gain = 2 VSENSE = 100mV Transient, 6V VS 60V, Gain = 50 VS = 4V IOUT = 200A, RIN = 100, ROUT = 5k IOUT = 1mA, RIN = 100, ROUT = 5k VS = 4V, IOUT = 0, RIN = 1Meg
1 0.5 1 1.5 140 200 220 240 450 475 475 525 500 590 640 690 720
s s kHz kHz A A A A A A A A A
VS = 6V, IOUT = 0, RIN = 1Meg
VS = 12V, IOUT = 0, RIN = 1Meg
250 375

VS = 60V, IOUT = 0, RIN = 1Meg LTC6101I LTC6101H Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LTC6101C and LTC6101I are guaranteed functional over the operating temperature range of - 40C to 85C. The LTC6101H is guaranteed functional over the operating temperature range of -40C to 125C.
Note 3: The LTC6101C is guaranteed to meet specified performance from 0C to 70C. The LTC6101C is designed, characterized and expected to meet specified performance from - 40C to 85C but is not tested or QA sampled at these temperatures. LTC6101I is guaranteed to meet specified performance from - 40C to 85C. The LTC6101H is guaranteed to meet specified performance from - 40C to 125C.
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LTC6101 TYPICAL PERFOR A CE CHARACTERISTICS
Input VOS vs Temperature
800 600 400 REPRESENTATIVE UNITS
MAXIMUM VSENSE (V)
INPUT OFFSET (V)
INPUT OFFSET (V)
200 0 - 200 - 400 - 600 - 800 B GRADE C GRADE -40 -20 0 RIN = 100 ROUT = 5k VIN = 5mV
- 1000
20 40 60 80 100 120 TEMPERATURE (C)
6101 G01
VOUT Maximum vs Temperature
12 VS = 60V 10
MAXIMUM OUTPUT (V)
VS = 12V
MAXIMUM IOUT (mA)
8 6 VS = 6V 4 VS = 4V 2 0 -40 -20
4 3 2 VS = 4V 1 0 -40 -20 VS = 6V
OUTPUT ERROR (%)
0
20 40 60 80 TEMPERATURE (C)
Gain vs Frequency
40 35 30 25
GAIN (dB) 160
TA = 25C RIN = 100 ROUT = 4.99k
IB (nA)
20 15 10 5 0 -5 -10 1k 10k 100k f (Hz) 1M
6101 G09
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UW
6101 G06
Input VOS vs Supply Voltage
40 20 0 -20 -40 -60 -80 TA = 85C RIN = 100 ROUT = 5k VIN = 5mV 4 11 18 25 32 39 VSUPPLY (V) TA = 0C TA = -40C TA = 45C
2 2.5
Input Sense Range
TA = 25C TA = 0C TA = -40C
TA = 70C 1.5 TA = 85C 1 RIN = 3k ROUT = 3k TA = 125C
-100 -120 -140
0.5
TA = 125C
0
46
53
60
4
11
18
25 32 39 VSUPPLY (V)
46
53
60
6101 G02
6101 G05
IOUT Maximum vs Temperature
7 6 5 VS = 12V VS = 60V
Output Error Due to Input Offset vs Input Voltage
100 TA = 25C GAIN =10
10
1
0.1
C GRADE B GRADE
100 120
0
20 40 60 80 TEMPERATURE (C)
100 120
6101 G07
0.01 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 INPUT VOLTAGE (V)
6101 G08
Input Bias Current vs Temperature
IOUT = 1mA
140 120 100 VS = 6V TO 60V VS = 4V
IOUT = 200A
80 60 40 20 0 -40 -20
0
20 40 60 80 TEMPERATURE (C)
100 120
6101 G10
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LTC6101 TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current vs Supply Voltage
450 400 85C 125C 70C
V+ + V -10mV 0.5V
SUPPLY CURRENT (A)
350 300 250 200 0C 150 100 50 0 0 4 8 12 16 20 24 24 32 36 40 44 48 52 56 60 SUPPLY VOLTAGE (V)
6101 G11
25C
-40C VIN = 0 RIN = 1M
Step Response 100mV
V+ V -100mV
+
VSENSE
5V
CLOAD = 10pF TA = 25C V+ = 12V RIN = 100 ROUT = 5k
CLOAD = 1000pF
0V
VOUT TIME (10s/DIV)
6101 G14
UW
Step Response 0mV to 10mV
VSENSE V+-10mV V+-20mV 1V
Step Response 10mV to 20mV
VSENSE
TA = 25C V+ = 12V RIN = 100 ROUT = 5k
TA = 25C V+ = 12V RIN = 100 ROUT = 5k
0V
VOUT TIME (10s/DIV)
6101 G12
0.5V
VOUT TIME (10s/DIV)
6101 G13
Step Response 100mV
V+ V -100mV
+
Step Response Rising Edge
VSENSE VSENSE =100mV
VSENSE TA = 25C V+ = 12V CLOAD = 2200pF RIN = 100 ROUT = 5k
5V
5.5V 5V TA = 25C V+ = 12V RIN = 100 ROUT = 5k IOUT = 100A
VOUT
0V
VOUT TIME (100s/DIV)
0.5V 0V
IOUT = 0 500ns/DIV
6101 G16
6101 G15
Step Response Falling Edge
VSENSE =100mV 5.5V 5V VOUT TA = 25C V+ = 12V RIN = 100 ROUT = 5k
IOUT = 100 0.5V 0V IOUT = 0 500ns/DIV
6101 G17
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LTC6101
PI FU CTIO S
OUT (Pin 1): Current Output. OUT (Pin 1) will source a current that is proportional to the sense voltage into an external resistor. V - (Pin 2): Negative Supply (or Ground for Single-Supply Operation). IN - (Pin 3): The internal sense amplifier will drive IN- (Pin 3) to the same potential as IN+ (Pin 4). A resistor (RIN) tied from V+ to IN- sets the output current IOUT = VSENSE/RIN. VSENSE is the voltage developed across the external RSENSE (Figure 1). IN+ (Pin 4): Must be tied to the system load end of the sense resistor, either directly or through a resistor. V+ (Pin 5): Positive Supply Pin. Supply current is drawn through this pin. The circuit may be configured so that the LTC6101 supply current is or is not monitored along with the system load current. To monitor only system load current, connect V+ to the more positive side of the sense resistor. To monitor the total current, including the LTC6101 current, connect V+ to the more negative side of the sense resistor.
BLOCK DIAGRA
ILOAD
-
VSENSE RSENSE
L O A D 3
4
LTC6101 2
Figure 1. LTC6101 Block Diagram and Typical Connection
APPLICATIO S I FOR ATIO
The LTC6101 high side current sense amplifier (Figure 1) provides accurate monitoring of current through a userselected sense resistor. The sense voltage is amplified by a user-selected gain and level shifted from the positive power supply to a ground-referred output. The output signal is analog and may be used as is or processed with an output filter. Theory of Operation An internal sense amplifier loop forces IN- to have the same potential as IN+. Connecting an external resistor,
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+
IN +
5k
-
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+
RIN 10V 5 V+
VBATTERY
IN -
5k
10V OUT V- 1
IOUT VOUT = VSENSE x ROUT
ROUT RIN
6101 BD
RIN, between IN- and V+ forces a potential across RIN that is the same as the sense voltage across RSENSE. A corresponding current, VSENSE/RIN, will flow through RIN. The high impedance inputs of the sense amplifier will not conduct this input current, so it will flow through an internal MOSFET to the output pin. The output current can be transformed into a voltage by adding a resistor from OUT to V -. The output voltage is then VO = V- + IOUT * ROUT.
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LTC6101
APPLICATIO S I FOR ATIO
Useful Gain Configurations
Gain 20 50 100 RIN 499 200 100 ROUT 10k 10k 10k VSENSE at VOUT = 5V 250mV 100mV 50mV
IOUT at VOUT = 5V 500A 500A 500A
Selection of External Current Sense Resistor The external sense resistor, RSENSE, has a significant effect on the function of a current sensing system and must be chosen with care. First, the power dissipation in the resistor should be considered. The system load current will cause both heat and voltage loss in RSENSE. As a result, the sense resistor should be as small as possible while still providing the input dynamic range required by the measurement. Note that input dynamic range is the difference between the maximum input signal and the minimum accurately reproduced signal, and is limited primarily by input DC offset of the internal amplifier of the LTC6101. In addition, RSENSE must be small enough that VSENSE does not exceed the maximum input voltage specified by the LTC6101, even under peak load conditions. As an example, an application may require that the maximum sense voltage be 100mV. If this application is expected to draw 2A at peak load, RSENSE should be no more than 50m. Once the maximum RSENSE value is determined, the minimum sense resistor value will be set by the resolution or dynamic range required. The minimum signal that can be accurately represented by this sense amp is limited by the input offset. The LTC6101 has a typical input offset of 150V, so in this system, if the minimum current is 20mA, a sense resistor of 7.5m will set VSENSE to 150V or the same value as the input offset. A larger sense resistor will reduce the error due to offset by increasing the sense voltage for a given load current. Choosing a 50m RSENSE will maximize the dynamic range and provide a system that has 100mV across the sense resistor at peak load (2A), while input offset causes an error equivalent to only 3mA of load current.
LOAD 2
LTC6101 ROUT
6101 F02
Figure 2. Kelvin Input Connection Preserves Accuracy Despite Large Load Current
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Peak dissipation is 200mW. If a 5m sense resistor is employed, then the effective current error is 30mA, while the peak sense voltage is reduced to 10mV at 2A, dissipating only 20mW. The low offset and corresponding large dynamic range of the LTC6101 make it more flexible than other solutions in this respect. The 150V typical offset gives 60dB of dynamic range for a sense voltage that is limited to 150mV max, and over 70dB of dynamic range if the rated input maximum of 500mV is allowed. Sense Resistor Connection Kelvin connection of the IN- and IN+ inputs to the sense resistor should be used in all but the lowest power applications. Solder connections and PC board interconnections that carry high current can cause significant error in measurement due to their relatively large resistances. One 10mm x 10mm square trace of one-ounce copper is approximately 0.5m. A 1mV error can be caused by as little as 2A flowing through this small interconnect. This will cause a 1% error in a 100mV signal. A 10A load current in the same interconnect will cause a 5% error for the same 100mV signal. By isolating the sense traces from the highcurrent paths, this error can be reduced by orders of magnitude. A sense resistor with integrated Kelvin sense terminals will give the best results. Figure 2 illustrates the recommended method.
V+ RSENSE RIN 4 3 5 1 VOUT
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LTC6101
APPLICATIO S I FOR ATIO
Selection of External Input Resistor, RIN
The external input resistor, RIN, controls the transconductance of the current sense circuit. Since IOUT = VSENSE/ RIN, transconductance gm = 1/RIN. For example, if RIN = 100, then IOUT = VSENSE /100 or IOUT = 1mA for VSENSE = 100mV. RIN should be chosen to allow the required resolution while limiting the output current. At low supply voltage, IOUT may be as much as 1mA. By setting RIN such that the largest expected sense voltage gives IOUT = 1mA, then the maximum output dynamic range is available. Output dynamic range is limited by both the maximum allowed output current and the maximum allowed output voltage, as well as the minimum practical output signal. If less dynamic range is required, then RIN can be increased accordingly, reducing the max output current and power dissipation. If low sense currents must be resolved accurately in a
CMPZ4697 10k M1 Si4465 RSENSE LO 100m
ILOAD VOUT
301
301
4 2
3
+-
5
VIN
LTC6101
V+
1
RSENSE
6101 F03a
DSENSE
LOAD
Figure 3a. Shunt Diode Limits Maximum Input Voltage to Allow Better Low Input Resolution Without Overranging
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system that has very wide dynamic range, a smaller RIN than the max current spec allows may be used if the max current is limited in another way, such as with a Schottky diode across RSENSE (Figure 3a). This will reduce the high current measurement accuracy by limiting the result, while increasing the low current measurement resolution. This approach can be helpful in cases where occasional large burst currents may be ignored. It can also be used in a multirange configuration where a low current circuit is added to a high current circuit (Figure 3b). Note that a comparator (LTC1540) is used to select the range, and transistor M1 limits the voltage across RSENSE LO. Care should be taken when designing the board layout for RIN, especially for small RIN values. All trace and interconnect impedances will increase the effective RIN value, causing a gain error. In addition, internal device resistance will add approximately 0.2 to RIN.
VLOGIC (3.3V TO 5V) 7 3 RSENSE HI 10m VIN 4 5 40.2k 6 4.7k 301 301 1.74M 2 4 2 3 619k LTC1540 1 HIGH RANGE INDICATOR (ILOAD > 1.2A)
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+ -
8
Q1 CMPT5551
+-
5
LTC6101
1
HIGH CURRENT RANGE OUT 250mV/A VLOGIC BAT54C
7.5k
R5 7.5k
(VLOGIC +5V) VIN 60V
0 ILOAD 10A
LOW CURRENT RANGE OUT 2.5V/A
6101 F03b
Figure 3b. Dual LTC6101s Allow High-Low Current Ranging
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LTC6101
APPLICATIO S I FOR ATIO
Selection of External Output Resistor, ROUT
The output resistor, ROUT, determines how the output current is converted to voltage. VOUT is simply IOUT * ROUT. In choosing an output resistor, the max output voltage must first be considered. If the circuit that is driven by the output does not limit the output voltage, then ROUT must be chosen such that the max output voltage does not exceed the LTC6101 max output voltage rating. If the following circuit is a buffer or ADC with limited input range, then ROUT must be chosen so that IOUT(MAX) * ROUT is less than the allowed maximum input range of this circuit. In addition, the output impedance is determined by ROUT. If the circuit to be driven has high enough input impedance, then almost any useful output impedance will be acceptable. However, if the driven circuit has relatively low input impedance, or draws spikes of current, such as an ADC might do, then a lower ROUT value may be required in order to preserve the accuracy of the output. As an example, if the input impedance of the driven circuit is 100 times ROUT, then the accuracy of VOUT will be reduced by 1% since:
VOUT = IOUT * ROUT * RIN(DRIVEN) ROUT + RIN(DRIVEN) 100 = 0.99 * IOUT * ROUT 101
= IOUT * ROUT *
Error Sources The current sense system uses an amplifier and resistors to apply gain and level shift the result. The output is then dependent on the characteristics of the amplifier, such as gain and input offset, as well as resistor matching. Ideally, the circuit output is:
LOAD
VOUT
R = VSENSE * OUT ; VSENSE = RSENSE * ISENSE RIN
2
In this case, the only error is due to resistor mismatch, which provides an error in gain only. However, offset voltage, bias current and finite gain in the amplifier cause additional errors:
LTC6101 ROUT RIN+ = RIN- - RSENSE
6101 F04
Figure 4. Second Input R Minimizes Error Due to Input Bias Current
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Output Error, EOUT, Due to the Amplifier DC Offset Voltage, VOS EOUT(VOS) = VOS * (ROUT/RIN) The DC offset voltage of the amplifier adds directly to the value of the sense voltage, VSENSE. This is the dominant error of the system and it limits the available dynamic range. The paragraph "Selection of External Current Sense Resistor" provides details. Output Error, EOUT, Due to the Bias Currents, IB(+) and IB(-) The bias current IB(+) flows into the positive input of the internal op amp. IB(-) flows into the negative input. EOUT(IBIAS) = ROUT((IB(+) * (RSENSE/RIN) - IB(-)) Since IB(+) IB(-) = IBIAS, if RSENSE << RIN then, EOUT(IBIAS) -ROUT * IBIAS For instance if IBIAS is 100nA and ROUT is 1k, the output error is 0.1mV. Note that in applications where RSENSE RIN, IB(+) causes a voltage offset in RSENSE that cancels the error due to IB(-) and EOUT(IBIAS) 0. In applications where RSENSE < RIN, the bias current error can be similarly reduced if an external resistor RIN(+) = (RIN - RSENSE) is connected as shown in Figure 4 below. Under both conditions: EOUT(IBIAS) = ROUT * IOS; IOS = IB(+) - IB(-)
V+ RIN- RSENSE RIN+ 4 3 5 1 VOUT
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LTC6101
APPLICATIO S I FOR ATIO
If the offset current, IOS, of the LTC6101 amplifier is 2nA, the 100 microvolt error above is reduced to 2 microvolts. Adding RIN+ as described will maximize the dynamic range of the circuit. For less sensitive designs, RIN+ is not necessary. Example: Let an ISENSE range = (1A to 1mA) and (VOUT/ISENSE) = 3V/1A Then, from the Electrical Characteristics of the LTC6101, RSENSE VSENSE (max) / ISENSE (max) = 500mV/1A = 500m Gain = ROUT/RIN = VOUT(max) / VSENSE (max) = 3V/500mV =6 If the maximum output current, IOUT, is limited to 1mA, ROUT equals 3V/1mA 3.01 k (1% value) and RIN = 3k/ 6 499 (1% value). The output error due to DC offset is 900Volts (typ) and the error due to offset current, IOS is 3k x 2nA = 6Volts (typical), provided RIN+ = RIN-. The maximum output error can therefore reach 906Volts or 0.03% (-70dB) of the output full scale. Considering the system input 60dB dynamic range (ISENSE = 1mA to 1A), the 70dB performance of the LTC6101 makes this application feasible. Output Error, EOUT, Due to the Finite DC Open Loop Gain, AOL, of the LTC6101 Amplifier This errors is inconsequential as the AOL of the LTC6101 is very large. Output Current Limitations Due to Power Dissipation The LTC6101 can deliver up to 1mA continuous current to the output pin. This current flows through RIN and enters the current sense amp via the IN(-) pin. The power dissipated in the LTC6101 due to the output signal is: POUT = (V-IN - VOUT) * IOUT Since V-IN V+, POUT (V+ - VOUT) * IOUT There is also power dissipated due to the quiescent supply current:
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PQ = IDD * V+ The total power dissipated is the output dissipation plus the quiescent dissipation: PTOTAL = POUT + PQ At maximum supply and maximum output current, the total power dissipation can exceed 100mW. This will cause significant heating of the LTC6101 die. In order to prevent damage to the LTC6101, the maximum expected dissipation in each application should be calculated. This number can be multiplied by the JA value listed in the package section on page 2 to find the maximum expected die temperature. This must not be allowed to exceed 150C, or performance may be degraded. As an example, if an LTC6101 is to be run at 55V 5V supply with 1mA output current at 80C: PQ(MAX) = IDD(MAX) * V+(MAX) = 41.4mW POUT(MAX) = IOUT * V+(MAX) = 60mW TRISE = JA * PTOTAL(MAX) TMAX = TAMBIENT + TRISE TMAX must be < 150C PTOTAL(MAX) 96mW and the max die temp will be 104C If this same circuit must run at 125C, the max die temp will increase to 150C. (Note that supply current, and therefore PQ, is proportional to temperature. Refer to Typical Performance Characteristics section.) In this condition, the maximum output current should be reduced to avoid device damage. It is important to note that the LTC6101 has been designed to provide at least 1mA to the output when required, and can deliver more depending on the conditions. Care must be taken to limit the maximum output current by proper choice of sense resistor and, if input fault conditions exist, external clamps. Output Filtering The output voltage, VOUT, is simply IOUT * ZOUT. This makes filtering straightforward. Any circuit may be used which
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LTC6101
APPLICATIO S I FOR ATIO
LOAD 2
f -3dB =
1 2 * * ROUT * COUT
LTC6101
Useful Equations Input Voltage: VSENSE = ISENSE * RSENSE Voltage Gain: Current Gain: VOUT R = OUT VSENSE RIN IOUT ISENSE = RSENSE RIN
RSENSE
Figure 5. V+ Powered Separately from Load Supply (VBATT)
V+ RIN 4 3
Transconductance: Transimpedance:
1 IOUT = VSENSE RIN VOUT = RSENSE * ROUT RIN
LOAD
2
ISENSE
LTC6101
Input Common Mode Range The inputs of the LTC6101 can function from 1.5V below the positive supply to 0.5V above it. Not only does this allow a wide VSENSE range, it also allows the input reference to be separate from the positive supply (Figure 5). Note that the difference between VBATT and V+ must be no more than the common mode range listed in the Electrical Characteristics table. If the maximum VSENSE is less than 500mV, the LTC6101 may monitor its own supply current, as well as that of the load (Figure 6).
Figure 6. LTC6101 Supply Current Monitored with Load
-
-
+
+
generates the required ZOUT to get the desired filter response. For example, a capacitor in parallel with ROUT will give a low pass response. This will reduce unwanted noise from the output, and may also be useful as a charge reservoir to keep the output steady while driving a switching circuit such as a mux or ADC. This output capacitor in parallel with an output resistor will create a pole in the output response at:
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VBATTERY RSENSE RIN 4 3 V+ 5 1 ROUT
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1
VOUT ROUT
6101 F06
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LTC6101
APPLICATIO S I FOR ATIO
Reverse Supply Protection Some applications may be tested with reverse-polarity supplies due to an expectation of this type of fault during operation. The LTC6101 is not protected internally from external reversal of supply polarity. To prevent damage that may occur during this condition, a Schottky diode should be added in series with V- (Figure 7). This will limit the reverse current through the LTC6101. Note that this diode will limit the low voltage performance of the LTC6101 by effectively reducing the supply voltage to the part by VD. In addition, if the output of the LTC6101 is wired to a device that will effectively short it to high voltage (such as through an ESD protection clamp) during a reverse supply condition, the LTC6101's output should be connected through a resistor or Schottky diode (Figure 8). Response Time The LTC6101 is designed to exhibit fast response to inputs for the purpose of circuit protection or signal transmission. This response time will be affected by the external circuit in two ways, delay and slew rate.
RSENSE R1 100 4 L O A D 2 3
+-
5 VBATT
LTC6101 D1
1 R2 4.99k
6101 F07
Figure 7. Schottky Prevents Damage During Supply Reversal
12
U
If the output current is very low and an input transient occurs, there may be an increased delay before the output voltage begins changing. This can be improved by increasing the minimum output current, either by increasing RSENSE or decreasing RIN. The effect of increased output current is illustrated in the step response curves in the Typical Performance Characteristics section of this datasheet. Note that the curves are labeled with respect to the initial output currents. The slew rate is also affected by the external circuit. In this case, if the input changes very quickly, the internal amplifier will slew the gate of the internal output FET (Figure 1) in order to maintain the internal loop. This results in current flowing through RIN and the internal FET. This current slew rate will be determined by the amplifier and FET characteristics as well as the input resistor, RIN. Using a smaller RIN will allow the output current to increase more quickly, increasing the slew rate at the output. This will also have the effect of increasing the maximum output current. Using a larger ROUT will increase the maximum output slew rate, since VOUT = IOUT * ROUT. Reducing RIN and increasing ROUT will both have the effect of increasing the voltage gain of the circuit.
RSENSE R1 100 4 L O A D 2 3 VBATT
W
UU
+-
5
LTC6101 D1
1
R3 1k ADC R2 4.99k
6101 F08
Figure 8. Additional Resistor R3 Protects Output During Supply Reversal
6101f
LTC6101
TYPICAL APPLICATIO S
Bidirectional Current Sense Circuit with Separate Charge/Discharge Output
IDISCHARGE CHARGER RSENSE ICHARGE
RIN D 100 RIN D 100 4 L O A D 2 3 RIN C 100 3 5 4
DISCHARGING: VOUT D = IDISCHARGE * RSENSE CHARGING: VOUT C = ICHARGE * RSENSE
LTC6101 Monitors Its Own Supply Current
ILOAD RSENSE
4 L O A D 2
3
+-
5 VBATT 1
LTC6101
R2 4.99k
VOUT = 49.9 * RSENSE LOAD + ISUPPLY
(I
U
)
RIN C 100
+-
5
-+
2
VBATT
LTC6101
1
1
+
ROUT D 4.99k
+ -
ROUT C 4.99k
LTC6101
VOUT D VOUT C
-
6101 TA02
(
ROUT D WHEN IDISCHARGE 0 RIN D
)
(
ROUT C WHEN ICHARGE 0 RIN C
)
High-Side-Input Transimpedance Amplifier
VS
R1 100
ISUPPLY
CMPZ4697* (10V) 4.75k
LASER MONITOR PHOTODIODE 4.75k
iPD
10k
4 2
3
+-
5
+
VOUT
-
6101 TA03
LTC6101
1 RL
VO
VO = IPD * RL *VZ SETS PHOTODIODE BIAS VZ + 4 VS VZ + 60
6101 TA04
6101f
13
LTC6101
TYPICAL APPLICATIO S
16-Bit Resolution Unidirectional Output into LTC2433 ADC
ILOAD
L O A D
14
U
-
VSENSE
+
RIN 100 4V TO 60V
4 2
3
+-
5 5V 2 1 VCC SCK LTC2433-1 ROUT 4.99k 5 IN
-
1F
LTC6101
1
VOUT
4
IN+
REF+
9 8 7 TO P
SDD CC FO 10
REF- GND 3 6
ROUT VOUT = * VSENSE = 49.9VSENSE RIN
ADC FULL-SCALE = 2.5V
6101 TA06
6101f
LTC6101
PACKAGE DESCRIPTIO
0.62 MAX
0.95 REF
3.85 MAX 2.62 REF
RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR
0.20 BSC 1.00 MAX DATUM `A'
0.30 - 0.50 REF 0.09 - 0.20 (NOTE 3) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
S5 Package 5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
2.90 BSC (NOTE 4) 1.22 REF 1.4 MIN 2.80 BSC 1.50 - 1.75 (NOTE 4) PIN ONE 0.30 - 0.45 TYP 5 PLCS (NOTE 3) 0.95 BSC 0.80 - 0.90 0.01 - 0.10 1.90 BSC
S5 TSOT-23 0302
6101f
15
LTC6101
TYPICAL APPLICATIO
CHARGER
Bidirectional Current Sense Circuit with Combined Charge/Discharge Output
IDISCHARGE RSENSE ICHARGE
RIN D RIN D 4 L O A D 2 3 RIN C 3 5 4
DISCHARGING: VOUT = IDISCHARGE * RSENSE CHARGING: VOUT = ICHARGE * RSENSE
RELATED PARTS
PART NUMBER LT1490/LT1491 LT1620/LT1621 DESCRIPTION Dual and Quad Micropower Rail-to-Rail Input and Output Op Amps Rail-to-Rail Current Sense Amplifiers COMMENTS 50A Amplifier, 2.7V to 40V Operation, Over-The-TopTM Inputs Accurate Output Current Programming, Battery Charging to 32V Bidirectional, 2.7V to 60V Operation 10mV Max VOS, 50nV/C Max Drift Indicates Charge Quantity and Polarity 10V Max Offset, 0.1% Gain Accuracy, 2.7V to 11V Operation 120dB CMRR, 3V to 18V Operation
LT1787/LT1787HV Precision High Side Current Sense Amplifiers LTC2053 LTC4150 LTC6915 LTC6943 Rail-to-Rail Input and Output, Zero-Drift Instrumentation Amp with Resistor-Programmable Gain Coulomb Counter/Battery Gas Gauge Zero-Drift Precision Instrumentation Amp with Digitally Programmable Gain Dual Precision Instrumentation Switched Capacitor Building Block
Over-The-Top is a trademark of Linear Technology Corporation.
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
U
RIN C
+-
5
-+
2
VBATT
LTC6101
1
1
+
VOUT ROUT
LTC6101
-
6101 TA05
(
ROUT WHEN IDISCHARGE 0 RIN D
)
(
ROUT WHEN ICHARGE 0 RIN C
)
6101f LT/LT 0305 * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2005

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